ch7525a-利来app官网

ch7525a-bf

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特征


  • compliant with displayport specification version 1.2a and embedded displayport (edp) specification version 1.3

  • up to 4 main link lanes at either 1.62gb/s or 2.7gb/s (hbr) link rate supported

  • support color depth 6/8/10/12bits

  • hdmi transmitter compliant with hdmi specification version 1.4b and dvi specification version 1.0

  • hdmi transmitter supports up to 300 mhz tmds clock, and supports up to 3.0gbps data rate for video timing of 1920x1080@120hz or 4kx2k@30hz

  • supports enhanced framing mode

  • fast and full link training for embedded displayport system

  • support edp authentication: alternative scramble seed reset and alternative framing

  • displayport receiver auto equalization supported for the compensation of input signal attenuation

  • support spread spectrum clocking (de-spreading) for emi reduction

  • hdcp engine compliant with hdcp 1.4 specification with internal hdcp keys

  • on-chip audio decoder which support 8 channel audio input from dp rx and output from hdmi tx with sample rate up to 192khz

  • embedded mcu to handle the control logic

  • support device boot up by loading firmware from on chip flash automatically

  • integrated edid buffer

  • 2 work modes: connect 27mhz crystal, inject 27mhz clock

  • dp input detection supported

  • support auto power saving mode and low stand-by current

  • dp aux channel and iic slave interface are available for firmware update and debug

  • low power architecture

  • rohs compliant and halogen free package

  • hbm 4kv esd performance

  • offered in 48-pin qfn package (6 x 6 mm)

描述

chrontel’s ch7525 is a low-cost, low-power semiconductor device that translates the displayport signal to hdmi/dvi. this innovative displayport receiver with an integrated hdmi transmitter is specially designed to target the notebook/ultrabook, tablet device and pc market segments. through the ch7525’s advanced decoding / encoding algorithm, the input displayport high-speed serialized multimedia data can be seamlessly converted to hdmi/dvi output.

the ch7525’s dp/edp receiver is compliant with the displayport specification 1.2a and the embedded displayport specification version 1.3. with internal hdcp key integrated, the device support hdcp 1.4 specifications. in the device’s receiver block, which supports four displayport main link lanes input with data rate running at either 1.62gb/s or 2.7gb/s, can accept rgb digital formats in either 18 bit or 24-bit, and converted the input signal to hdmi output up to 1920x1080@120hz or 3840x2160@30hz. leveraging the displayport’s unique source/sink “link training” routine, the ch7525 is capable of instantly bring up the video display to the hdmi/dvi tv/monitor when the initialization process is completed.

the ch7525 also supports up to 8-channel audio input from dp rx and output from hdmi tx with sample rate up to 192 khz. available audio bandwidth depends on the pixel clock frequency, the video format timing, and whether or not content protection re-synchronization is needed.

with sophisticated mcu and the on chip flash, ch7525 support auto-boot and edid buffer. leveraging the firmware auto-loaded from flash, ch7525 can support dp input detection and determine to enter into power saving mode automatically.

结构图

应用说明

 pcb layout and design guide for ch7525 4 lane displayport to hdmi 1.4 converter, anb036

技术报告

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规格

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订单信息

part number package type operating temperature range minimum order quantity

ch7525a-bf 48 qfn, lead-free commercial : 0 to 70°c 490/tray

ch7525a-bfi 48 qfn, lead-free commercial : -40 to 85°c 490/tray

视频

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昆泰集成电路(上海)有限公司成立于2003年,开发和销售混合信号集成电路。公司是个人电脑、便携式媒体播放器和智能手机显示接口ic的领先供应商。连接到不同的计算平台标准,包括电视、hdtv、lcd和pc显示器。我们的产品包括电视解码器,电视编码器,dvi/lvds/hdmi编码器,数字电视解调器,图像和音频处理,显示...

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